Mediatek Jargon: Difference between revisions

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Created page with "= Mediatek Jargon = * SLBC ** System Level Buffer and Cache. Part of the EMI. DRAM cache that appears to be for I/O. Improves system performance and is not required. ** https://chromium-review.googlesource.com/c/chromiumos/third_party/kernel/+/6074016 * EMI ** External memory interconnect? Also referred to as the interconnect (ICC) or DRAM scheduler or DRAM controller. * DVFSRC ** Dynamic Voltage and Frequency Scaling Resource Controller. Collects requests from softwa..."
 
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= Mediatek Jargon =
= Mediatek Jargon =


* SLBC
== SoC Components ==
** System Level Buffer and Cache. Part of the EMI. DRAM cache that appears to be for I/O. Improves system performance and is not required.
** https://chromium-review.googlesource.com/c/chromiumos/third_party/kernel/+/6074016


* EMI
=== SLBC ===
** External memory interconnect? Also referred to as the interconnect (ICC) or DRAM scheduler or DRAM controller.
* Only on MT8196?
* System Level Buffer and Cache. Part of the EMI. DRAM cache that appears to be for I/O. Improves system performance and is not required.
* https://chromium-review.googlesource.com/c/chromiumos/third_party/kernel/+/6074016


* DVFSRC
=== EMI ===
** Dynamic Voltage and Frequency Scaling Resource Controller. Collects requests from software and hardware to decide on minimum operating voltage and DRAM frequency. Talks to the EMI to set DRAM stuff and talks to regulators to set voltage.
* External memory interconnect?
** https://lore.kernel.org/all/20240610085735.147134-1-angelogioacchino.delregno@collabora.com/
* Also referred to as the interconnect (ICC) or DRAM scheduler or DRAM controller.


* MMSYS
=== DVFSRC ===
** Multimedia subsystem? Includes display, camera, video encode/decode, image processing, vpu.
* Dynamic Voltage and Frequency Scaling Resource Controller. Collects requests from software and hardware to decide on minimum operating voltage and DRAM frequency. Talks to the EMI to set DRAM stuff and talks to regulators to set voltage.
* https://lore.kernel.org/all/20240610085735.147134-1-angelogioacchino.delregno@collabora.com/
 
=== MMSYS ===
* Multimedia subsystem
* Includes display, camera, video encode/decode, image processing, vpu.

Revision as of 03:06, 18 December 2025

Mediatek Jargon

SoC Components

SLBC

EMI

  • External memory interconnect?
  • Also referred to as the interconnect (ICC) or DRAM scheduler or DRAM controller.

DVFSRC

MMSYS

  • Multimedia subsystem
  • Includes display, camera, video encode/decode, image processing, vpu.